In this Women in Engineering feature, Vaishali from Semiconductor For You speaks with Preethi Ashwath, Senior Analog Design Engineer at Analog Devices, about her journey into analog design and its critical role in enabling edge AI. From silicon validation to system-level thinking, she shares insights on mastering complexity, navigating trade-offs, and building impact in a deeply demanding yet rewarding field.
Can you walk us through your journey from academia to becoming a Senior Analog Design Engineer, and what drew you to analog and mixed-signal design?
Although I was always curious about circuit design through my engineering studies, I did not fully commit to analog until my internship at Intel during my Master’s at UC Irvine. What made that internship particularly valuable was the breadth of exposure it offered — I worked across CAD scripting, package design, EM/IR analysis and custom block simulations. Seeing every layer of chip development — design, verification, layout, digital, packaging — gave me a complete picture of what goes into building a semiconductor product.
Through that experience I realised I felt most connected to design. It was the creativity that drew me in. Every domain in semiconductor engineering is essential and demanding in its own right — but for me personally, design is where I felt most alive. You start with a specification and build a circuit that has never existed before.
What has kept me in analog specifically is that it demands patience and rewards mastery. You design a circuit, wait for silicon to come back from the foundry, and find out if your instincts were right. That process — and the depth of physics it requires — means there is always more to learn. I still feel I am mastering the art.
You’ve worked across organizations like Intel and Analog Devices — how have these experiences shaped your approach to solving complex design challenges?
Intel was where I became a designer. It offered a continued education in the truest sense — I did my first independent circuit design there, characterized an LDO I had built from scratch, and experienced for the first time the satisfaction of seeing real silicon behave exactly as I had predicted in simulation. That moment — when the measurements match — is something no textbook can teach you. It gave me confidence in my own instincts as a designer.
ADI expanded the scope of what I was responsible for. Where Intel gave me depth on individual circuits, ADI gave me the opportunity to handle complete and complex designs — including full ESD pad-ring architectures managing protection across an entire chip with multiple voltage domains. The complexity at that system level requires thinking about interactions between circuits that simulation often cannot fully capture.
ADI also gave me visibility beyond the design bench — representing the company as a technical presenter at CES, NAMM and ADI GTC, and contributing to trade publications. That combination of deep technical work and external engagement has shaped how I think about impact. I am still mastering one skill at a time and feel there is much more ahead.
Your work focuses on enabling AI at the edge — how does analog and mixed-signal design contribute to low-power edge AI systems?
Analog and mixed-signal design is the foundation that AI systems are built on. Every semiconductor chip powering an AI application depends on analog circuits — voltage regulators delivering clean power to processors, ESD protection ensuring chips survive real-world use, analog front-ends conditioning signals before digital processing. Without these blocks working correctly, no AI inference happens at all.
What makes analog irreplaceable is that it cannot be shortcut. Unlike digital design which has benefited from automation, analog remains rooted in physics intuition. Every transistor must be sized deliberately. You cannot prompt your way to a working analog circuit — it requires deep expertise built over years.
As AI expands into edge devices and industrial systems, the demand for power-efficient analog blocks will only grow. That is the work analog engineers do every day.
What are the key design trade-offs when building high-performance yet power-efficient mixed-signal ICs for consumer applications?
Every analog block involves competing constraints that cannot all be optimized simultaneously — and navigating those trade-offs is the core skill of an analog designer.
Take ESD protection as an example. You are simultaneously managing area, leakage current, HBM and CDM protection levels, and the speed of the protection response. A larger device protects better but consumes more area and introduces more leakage — which directly impacts power efficiency in a consumer application where every microamp matters.
In LDO design the trade-offs are equally interconnected. Power consumption, stability and PSRR are not independent variables. As you increase gain to improve PSRR, stability becomes harder to maintain — gain and PSRR are tightly coupled, and pushing one puts pressure on the other. Resolving that tension requires careful compensation network design and often iterating between simulation and silicon to find the right balance.
Having showcased systems at global platforms like CES and NAMM, what key trends are you observing in audio and edge AI applications?
Representing Analog Devices at CES 2025 and NAMM 2025 gave me a firsthand view of where consumer electronics and professional audio are heading.
At CES the dominant trend was intelligence moving closer to the user — devices that sense, process and interpret signals locally rather than relying on cloud connectivity. Hearables are evolving from audio playback devices into health monitoring platforms, with analog front-ends playing a critical role in extracting meaningful physiological signals from noisy real-world environments.
At NAMM the focus was on connectivity and audio quality — ADI’s A2B automotive audio bus technology demonstrated how a single thin wire can carry multichannel high-fidelity audio across complex systems, reducing wiring complexity while improving signal integrity.
The common thread is that as devices become smarter, the demands on analog design become more stringent. The intelligence of the system is only as good as the quality of the analog signal it starts with.
As a reviewer for IEEE ISCAS, what emerging innovations in analog design excite you the most today?
Honestly, reviewing papers for IEEE ISCAS, MWSCAS and IEEE CONECCT is as much a learning experience for me as it is a contribution. Reading cutting-edge submissions keeps me connected to where the field is heading beyond my own day-to-day work.
The areas I find myself most engaged with are new SERDES architectures, LDO innovations targeting ultra-low quiescent current, and circuits designed specifically for AI hardware applications. These are domains I work in directly, so seeing how researchers are pushing boundaries gives me fresh perspectives I bring back to my own designs.
It is one of the most valuable aspects of the reviewing role — the learning is mutual.
You’ve received recognitions such as the ADI Analog Impact Award — what kind of contributions do you believe create the most impact in this field?
The ADI Analog Impact Award recognized cross-functional business impact — and that framing reflects how I think about meaningful contribution. It is not just about a technically elegant circuit. It is about owning a problem end to end and seeing it through to completion in a way that creates real value.
The contributions that matter most share that quality — ownership and follow-through. A circuit that comes back from the foundry and works. A solution adopted beyond the original program. A design that prevents a respin or enables something that was not possible before.
Academic recognition shaped this mindset early — graduating with three Gold Medals and 2nd University Rank at VTU taught me that genuine mastery of fundamentals is what distinguishes good work from great work. That foundation has stayed with me.
What advice would you give to aspiring engineers, especially women, looking to build a career in semiconductor design?
I will be honest — the corporate world is not yet fully friendly for women in engineering. In analog IC design women represent roughly 11% of the field. You will often be the only woman in a room full of engineers. There is limited representation at senior and board levels. That reality needs to be acknowledged, not glossed over.
But that is also exactly why it matters that women embrace difficult STEM fields like analog design. Every woman who stays, builds expertise and rises makes the field more accessible for the next generation. Representation at the top changes what young women believe is possible for themselves.
On a personal level — routine and self-kindness are your greatest assets. This is a demanding field and the pressures are real. Build habits that sustain you. And most importantly — do not measure your growth against someone else’s yardstick. Everyone’s journey is different. Only you know the full picture of your life and what you are navigating. Define success on your own terms and keep going.