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Alchip and Ayar Labs Unveil Co-Packaged Optics for AI Datacenter Scale-Up

Semiconductor For You by Semiconductor For You
September 27, 2025
in Semiconductor News
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Joint innovation enables ultra-high bandwidth, low latency, high radix, and energy efficiency for multi-rack AI clusters

SAN JOSE, Calif. — Sept. 26, 2025 — At the 2025 TSMC North America Open Innovation Platform® (OIP) Ecosystem Forum, Alchip Technologies, the high-performance ASIC leader, and Ayar Labs, a leader in co-packaged optics (CPO) for large-scale AI workloads, unveiled a CPO solution that is designed to efficiently extend scale-up network connectivity beyond traditional rack boundaries. 

This joint offering aims to address data movement bottlenecks that are slowing AI infrastructure by effectively reducing system stall times and enabling next-gen, large, high-performance AI clusters.

As AI models and cluster sizes continue to grow, traditional copper interconnects are reaching their physical and energy limits. This is constraining system design, bandwidth, and power efficiency. Latency must be reduced, and radix must be increased if thousands of AI accelerators are to act as one logical device under scale-up networks. By replacing copper with CPO, the Alchip and Ayar Labs solution is designed to deliver extended reach, low latency, power efficiency, and high radix needed for large-scale accelerator deployments.

“AI cluster scale up networks are bounded by copper connectivity distances. At the same time, network power efficiency is limited by power density and cooling,” explained Erez Shaizaf, Alchip’s Chief Technical Officer. “This means that we want to optimize space efficiency, but the challenge is that copper doesn’t have the I/O connectivity to put everything together. CPO will break these boundaries.”  

The new joint solution features Ayar Labs’ TeraPHY™ optical engines co-packaged with Alchip’s advanced solutions on a common substrate, bringing optical I/O directly to the AI accelerator interface. This integration enables more than 100 terabits per second (Tbps) of scale-up bandwidth per accelerator and supports more than 256 optical scale-up ports per device. TeraPHY™ is also protocol agnostic and enables flexible integration with customer-designed chiplets and fabrics.

“AI has reached an inflection point where traditional interconnects are limiting performance, power, and scalability,” said Vladimir Stojanovic, CTO and co-founder of Ayar Labs. “Our collaboration with Alchip enables a CPO solution for AI scale-up, pioneering new, energy-efficient system architectures that will power innovations for hyperscalers and enterprise AI customers, and accelerate AI proliferation, globally.”

The co-packaged solution from Alchip and Ayar Labs enables multi-rack network scale-up without the power and latency penalties of pluggable optics by minimizing electrical trace lengths and placing optical connections close to the compute core. With support for the UCIe™ standard for die-to-die interconnect, and flexible protocol endpoints at the package boundary, design teams can integrate the scale-up fabric solution from Alchip and Ayar Labs alongside existing compute tiles, memory stacks, and accelerators while meeting performance, signal-integrity, and thermal requirements at the package level. The two companies are engaging with selected customers to integrate co-packaged optics into next-generation AI accelerators and scale-up switches. The companies will share additional collateral, reference architectures, and build options with qualified design teams.

View the Alchip and Ayar Labs presentation, “Enabling Next-Gen AI Infrastructure with Co-Packaged Optics and Advanced Packaging,” from the 2025 TSMC North America OIP Ecosystem Forum here.

 

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Tags: AI Data CentersAIchipAyar LabsInterconnectoptics
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