GUC and Ayar Labs Partner to Advance Co-Packaged Optics for Hyperscalers

HSINCHU, Taiwan and SAN JOSE, Calif. – Nov. 17, 2025 – Global Unichip Corp. (GUC), the Advanced ASIC leader, and Ayar Labs, a leader in co-packaged optics (CPO) for large-scale AI workloads, have announced a strategic partnership to integrate CPO into GUC’s advanced ASIC design services.

This collaboration paves the way for high-bandwidth, low-latency, power-efficient optical interconnects in next-generation AI, HPC and networking applications where electrical signaling is reaching its limits. By integrating Ayar Labs’ TeraPHY™ optical engines into GUC’s advanced packaging and ASIC workflow, the companies are exploring critical areas to enable future CPO deployment.

“The CPO revolution is at our doorstep. Integrating Ayar Labs’ optical engines into our advanced packaging flows is a critical step,” said Igor Elkanovich, CTO of GUC. “Our new joint design allows us to address the challenges of CPO integration – architectural, power and signal integrity, mechanical and thermal – ensuring our future customers have access to a robust, high-bandwidth and power-efficient solution.”

The new XPU multi-chip package (MCP) design replaces traditional electrical interconnects with Ayar Labs’ optical engines attached directly to the MCP organic substrate. This architecture enables more than 100 Tbps full-duplex optical interface from the XPU package, more than an order of magnitude improvement over current XPUs.

UCIe-S (64 Gbps) provides bandwidth between the optical engines and I/O chiplets over the MCP substrate, while UCIe-A (64 Gbps) is used for communication between the I/O chiplet to the main AI die over local silicon interconnect (LSI) bridges. The design also addresses signal and power integrity challenges associated with the large-scale package. Thermal optimization is done at the XPU MCP level, and a new stiffener design incorporates optical engines’ requirements and enables detachable fiber connections while meeting mechanical stress and warpage requirements.

“The future of AI and data center scale-up will not be possible without optics to overcome the electrical I/O bottleneck,” said Vladimir Stojanovic, CTO and co-founder of Ayar Labs. “Working with GUC on advanced packaging and silicon technologies is an important step in demonstrating how our optical engines can accelerate the implementation of co-packaged optics for hyperscalers and AI scale-up.”

GUC will share more about these technology advancements during a presentation titled “Advanced Packaging Technologies for Modular and Powerful Compute” at the 2025 TSMC Open Innovation Platform (OIP) Ecosystem Forum in Hsinchu, Taiwan, on Tuesday, Nov. 18, 2025.