Phase lock loop (pll) and how phase lock loop works

The starting from computing to communication the phase lock loops are widely used in many electronic applications. So in the communication they are used in the synchronization and the demodulation circuits.

In the communication system for the jitter and the noise reduction the phase lock loop is commonly used. Then one of the most common applications of the PLL is in the frequency synthesizers. So using this phase lock loop it is possible to generate the output frequency which is multiple of the input frequency and in the microprocessor they are used.

Let’s see how its work, it is the control system or the control loop which maintains the same phase between the input and the output signal. So, let’s us understand what do we mean by the phase difference. The two signals are of the same frequency but there is a constant phase difference between the two signals while in other hand the two waveforms start at the same time but they are of different frequency so in this case the phase difference between the two signals is continuously changing with time. So the phase lock loop system synchronize the output signal with the input signal in the phase as well as in the frequency. So when the output frequency is equal to the input frequency and there is a no phase difference between the two signal then we can say that the loop is in the lock condition.

The phase lock loop consists of 3 basic blocks Phase detector,Loop filter or the low pass filter and voltage control oscillator

Phase detector

a) At a given point of time, one signal has some phase alpha while another signal has some phase bita that means the phase difference between the two signals is equal to alpha-bita. At the radio frequencies, the balanced mixer is used as a phase detector. While for the digital signals, the phase frequency detector or even an XOR gate can be used for phase detection.

voltage control oscillator

a) In the voltage control oscillator as the control voltage changes, then the frequency of the oscillation also changes. So whenever the loop is just turnes on then the VCO runs at the center frequency and this frequency is also known as the free-running frequency.

b) Now the phase detector compares the input or the reference signal with the oscillator frequency based on that it generates the error signal, now this error signal is passed through the low pass filter and the low pass filter generates the error voltage based on the signal and based on this error voltage, the VOC either increase or reduces the oscillator frequency until the oscillator frequency locks to the input frequency. And under the lock condition, there may be a no phase difference or the constant phase difference the two signals.

c) Now under the no lock condition, the PLL can acquire the lock only if the input signal is within the capture range of the PLL that means whenever the input signal is within the capture range then the VCO can lock to the input signal. That means the capture range is the range of the input frequencies around the VCO center frequency onto which the loop can lock when starting from the unlocked condition.

d) The another is lock range and it is defines the range of the input frequencies over which the loop remains in the lock comdition once it has captured the input signal.