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Cadence Announces Collaboration with Intel Foundry to Accelerate Intel 14A Process Optimization for HPC and Mobile Designs

Semiconductor For You by Semiconductor For You
June 9, 2026
in Semiconductor News
0

Expanded cooperation spans DTCO, IP readiness and design enablement to advance next-generation customer innovation

 
National, India, June 8, 2026; Cadence (Nasdaq: CDNS) today announced an expanded collaboration with Intel Foundry to advance Design Technology Co-Optimization (DTCO) targeting Intel’s next-generation process technologies, beginning with Intel 14A. The new multi-year agreement combines Cadence’s agentic AI-driven EDA and Design IP solutions with Intel’s process innovation and advanced design expertise.
The DTCO collaboration focuses on optimizing tools, flows, and methodologies to deliver industry-leading performance, power, and area (PPA). Cadence and Intel will work closely to optimize Intel 14A to deliver production-ready PDKs. The collaboration will also leverage Cadence’s agentic AI flows and core products to accelerate time-to-market and reduce design risk.
“Advancing our relationship with Intel into a much deeper partnership is a major milestone for both companies,” said Anirudh Devgan, president and chief executive officer, Cadence. “This collaboration will leverage the strengths of both companies to empower customers to unlock new levels of performance, power, and efficiency, advance the state of the art and accelerate the realization of next-generation products.”
“Our expanded collaboration with Cadence reflects Intel Foundry’s continued focus on delivering on its technology roadmap and ecosystem on behalf of our customers,” said Naga Chandrasekaran, executive vice president and general manager of Intel Foundry. “By combining Intel’s process and packaging with Cadence’s AI-driven design tools, we are enabling deeper co-optimization, strengthening our ability to deliver on customers’ needs, and showcasing the ability of both companies to drive innovation at scale.”
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